内容简介：
Complete with real-world case studies, examples, and suggestions for further research, this book offers a wholly unique perspective on the digital design kit. It points to hidden value in the safety margins of standard-cell libraries and shows design engineers and managers how to use this knowledge to beat the competition. Revealing how to extract value from existing std-cells and EDA tools in order to produce tighter-margined, smaller, faster, less power-hungry, and more yield-producing integrated circuits, this book will help readers become more astute designers.